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00035 #ifndef BOARD_H
00036 #define BOARD_H
00037
00038 #ifndef F_CPU
00039 # error "F_CPU is undefined"
00040 #endif
00041
00042
00043 #include <stdlib.h>
00044 #include <stdint.h>
00045 #include <inttypes.h>
00046 #include <avr/io.h>
00047 #include <avr/sleep.h>
00048 #include <avr/interrupt.h>
00049 #include <util/delay.h>
00050 #include <avr/pgmspace.h>
00051 #include <avr/eeprom.h>
00052 #include <util/crc16.h>
00053 #include "const.h"
00054 #include "board_cfg.h"
00055
00061
00074 #define DELAY_US(x) _delay_ms(x/1000.0)
00075
00078 #define DELAY_MS(x) _delay_ms(x)
00079
00080 #ifndef PULLUP_KEYS
00081
00084 # define PULLUP_KEYS (0)
00085 #endif
00086
00087
00091 #define SLEEP_ON_IDLE()\
00092 do{\
00093 set_sleep_mode(SLEEP_MODE_IDLE);\
00094 sleep_mode();\
00095 }while(0);
00096
00097
00098 #ifdef NO_TIMER
00099
00101 # define TIMER_POOL_SIZE (0)
00102 # define TIMER_INIT() do{}while(0)
00103 # define TIMER_IRQ TIMER1_OVF_vect
00104 #endif
00105
00106 #ifndef HIF_DEFAULT_BAUDRATE
00107 # define HIF_DEFAULT_BAUDRATE (9600)
00108 #endif
00109
00110 #ifndef HIF_TYPE
00111
00112 # define NO_HIF (1)
00113 # define HIF_TYPE (HIF_NONE)
00114 #endif
00115
00116 #ifndef HIF_IO_ENABLE
00117
00118 # define HIF_IO_ENABLE() do{}while(0)
00119 #endif
00120
00121 #define HIF_TYPE_IS_UART ((HIF_TYPE >= HIF_UART_0) && ( HIF_TYPE <= HIF_UART_1))
00122 #define HIF_TYPE_IS_USB ((HIF_TYPE == HIF_FT245) || (HIF_TYPE == HIF_AT90USB))
00123
00124
00125 #ifndef TRX_RESET_INIT
00126
00127 # define TRX_RESET_INIT() DDR_TRX_RESET |= MASK_TRX_RESET
00128 #endif
00129
00130 #ifndef TRX_RESET_HIGH
00131
00132 # define TRX_RESET_HIGH() PORT_TRX_RESET |= MASK_TRX_RESET
00133 #endif
00134
00135 #ifndef TRX_RESET_LOW
00136
00137 # define TRX_RESET_LOW() PORT_TRX_RESET &= ~MASK_TRX_RESET
00138 #endif
00139
00140 #ifndef TRX_SLPTR_INIT
00141
00142 # define TRX_SLPTR_INIT() DDR_TRX_SLPTR |= MASK_TRX_SLPTR
00143 #endif
00144
00145 #ifndef TRX_SLPTR_HIGH
00146
00147 # define TRX_SLPTR_HIGH() PORT_TRX_SLPTR |= MASK_TRX_SLPTR
00148 #endif
00149
00150 #ifndef TRX_SLPTR_LOW
00151
00152 # define TRX_SLPTR_LOW() PORT_TRX_SLPTR &= ~MASK_TRX_SLPTR
00153 #endif
00154
00155 #if ! defined(DI_TRX_IRQ) && ! defined(EI_TRX_IRQ)
00156
00157 # define DI_TRX_IRQ disable_all_trx_irqs
00158 # define EI_TRX_IRQ enable_all_trx_irqs
00159 #endif
00160
00161 #if defined (DBG_PORT) && defined (DBG_DDR) && defined (DBG_PIN)
00162 # define DBG_INIT() do{DBG_DDR |= DBG_PIN; DBG_PORT &= ~DBG_PIN;}while(0)
00163 # define DBG_SET() do{DBG_PORT |= DBG_PIN;}while(0)
00164 # define DBG_CLR() do{DBG_PORT &= ~DBG_PIN;}while(0)
00165 # define DBG_TOGGLE() do{DBG_PORT ^= DBG_PIN;}while(0)
00166 #else
00167 # define DBG_INIT() do{}while(0)
00168 # define DBG_SET() do{}while(0)
00169 # define DBG_CLR() do{}while(0)
00170 # define DBG_TOGGLE() do{}while(0)
00171 #endif
00172
00173
00182 typedef struct
00183 {
00185 uint16_t short_addr;
00187 uint16_t pan_id;
00189 uint64_t ieee_addr;
00191 uint8_t channel;
00193 uint8_t _reserved_[2];
00195 uint8_t crc;
00196 } node_config_t;
00197
00207 static inline uint8_t get_node_config(node_config_t *ncfg)
00208 {
00209 uint8_t i = sizeof(node_config_t);
00210 uint8_t *pram = (uint8_t*)ncfg;
00211 uint8_t crc = 0, zcnt = 0;
00212 do
00213 {
00214 #if FLASHEND > 0xffffL
00215 *pram = pgm_read_byte_far(((long)FLASHEND - i + 1));
00216 #else
00217 *pram = pgm_read_byte_near((FLASHEND - i + 1));
00218 #endif
00219
00220 crc = _crc_ibutton_update(crc, *pram);
00221 zcnt += *pram ? 0 : 1;
00222 pram ++;
00223 }
00224 while(--i);
00225
00226
00227 if (zcnt == sizeof(node_config_t))
00228 {
00229 crc = 0x55;
00230 }
00231
00232 return crc;
00233 }
00234
00245 static inline uint8_t get_node_config_eeprom(node_config_t *ncfg, uint8_t * offset)
00246 {
00247 uint8_t i = sizeof(node_config_t);
00248 uint8_t *pram = (uint8_t*)ncfg;
00249 uint8_t crc = 0, zcnt = 0;
00250 do
00251 {
00252 *pram = eeprom_read_byte( (const uint8_t *) offset++ );
00253 crc = _crc_ibutton_update(crc, *pram);
00254 zcnt += *pram ? 0 : 1;
00255 pram ++;
00256 }
00257 while(--i);
00258 if (zcnt == sizeof(node_config_t))
00259 {
00260 crc = 0x55;
00261 }
00262 return crc;
00263 }
00264
00274 static inline void store_node_config_eeprom(node_config_t *ncfg, uint8_t * offset)
00275 {
00276 uint8_t i = sizeof(node_config_t) - sizeof(uint8_t);
00277 uint8_t *pram = (uint8_t*)ncfg;
00278 uint8_t crc = 0;
00279 do
00280 {
00281 eeprom_write_byte( (uint8_t *)offset++, *pram );
00282 crc = _crc_ibutton_update(crc, *pram++);
00283 }
00284 while(--i);
00285 eeprom_write_byte((uint8_t *)offset, crc );
00286 }
00287
00291 static inline void jump_to_bootloader(void)
00292 {
00293 typedef void (*func_ptr_t)(void) __attribute__((noreturn));
00294 const func_ptr_t jmp_boot = (func_ptr_t) BOOT_LOADER_ADDRESS;
00295 jmp_boot();
00296 }
00297
00298
00299 #ifdef __cplusplus
00300 extern "C" {
00301 #endif
00302
00303 #ifdef __cplusplus
00304 }
00305 #endif
00306
00308 #endif